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Analog Devices Semiconductor Electronic Components Datasheet

AD9100 Datasheet

Ultrahigh Speed Monolithic Track-and-Hold

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a
Ultrahigh Speed
Monolithic Track-and-Hold
AD9100*
FEATURES
Excellent Hold Mode Distortion into 250
–88 dB @ 30 MSPS (2.3 MHz VIN)
–83 dB @ 30 MSPS (12.1 MHz VIN)
–74 dB @ 30 MSPS (19.7 MHz VIN)
16 ns Acquisition Time to 0.01%
<1 ps Aperture Jitter
250 MHz Tracking Bandwidth
83 dB Feedthrough Rejection @ 20 MHz
3.3 nV/Hz Spectral Noise Density
MlL-STD-Compliant Versions Available
APPLICATIONS
A/D Conversion
Direct IF Sampling
Imaging/FLIR Systems
Peak Detectors
Radar/EW/ECM
Spectrum Analysis
CCD ATE
GENERAL DESCRIPTION
The AD9100 is a monolithic track-and-hold amplifier which
sets a new standard for high speed and high dynamic range
applications. It is fabricated in a mature high speed complemen-
tary bipolar process. In addition to innovative design topologies,
a custom package is utilized to minimize parasitics and optimize
dynamic performance.
Acquisition time (hold to track) is 13 ns to 0.1% accuracy, and
16 ns to 0.01%. The AD9100 boasts superlative hold-mode
frequency domain performance; when sampling at 30 MSPS
hold mode distortion is less than 83 dBfs for analog frequencies
up to 12 MHz; and –74 dBfs at 20 MHz. The AD9100 can also
drive capacitive loads up to 100 pF with little degradation in
acquisition time; it is therefore well suited to drive 8- and 10-bit
flash converters at clock speeds to 50 MSPS. With a spectral
noise density of 3.3 nV/Hz and feedthrough rejection of 83 dB
at 20 MHz, the AD9100 is well suited to enhance the dynamic
range of many 8- to 16-bit systems.
FUNCTIONAL BLOCK DIAGRAM
CLK CLK
50
VIN
A1 SWITCH CHOLD
22pF
A2
؎2.3V
CLAMP
AD9100
VOUT
The AD9100 is “user friendly” and easy to apply: (1) it requires
+5 V/–5.2 V power supplies; (2) the hold capacitor and switch
power supply decoupling capacitors are built into the DIP pack-
age; (3) the encode clock is differential ECL to minimize clock
jitter; (4) the input resistance is typically 800 k; (5) the analog
input is internally clamped to prevent damage from voltage
transients.
The AD9100 is available in a 20-lead side-brazed “skinny DIP”
package. Commercial, industrial, and military temperature
grade parts are available. Consult the factory for information
about the availability of 883-qualified devices.
PRODUCT HIGHLIGHTS
1. Hold Mode Distortion is guaranteed.
2. Monolithic construction.
3. Analog input is internally clamped to protect against over-
voltage transients and ensure fast recovery.
4. Output is short circuit protected.
5. Drives capacitive loads to 100 pF.
6. Differential ECL clock inputs.
*Patent pending.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998


Analog Devices Semiconductor Electronic Components Datasheet

AD9100 Datasheet

Ultrahigh Speed Monolithic Track-and-Hold

No Preview Available !

AD9100–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (unless otherwise noted, +VS = +5 V; –VS = –5.2 V; RLOAD = 100 ; RIN = 50 )
Test
AD9100JD/AD/SD1
Parameter
Conditions
Temp
Level Min Typ
Max
Units
DC ACCURACY
Gain
Offset
Output Resistance
Output Drive Capability
PSRR
Pedestal Sensitivity to Supply
VIN = 2 V
VIN = 0 V
VS = 0.5 V p-p
VS = 0.5 V p-p
Full
Full
25°C
Full
Full
Full
VI 0.989 0.994
V/V
VI –5 ± 1
+5 mV
V 0.4
VI ± 40 ± 60
mA
VI 48 55
dB
VI 0.9 3 mV/V
ANALOG INPUT/OUTPUT
Output Voltage Range
Input Bias Current
Input Overdrive Current2
Input Capacitance
Input Resistance
CLOCK/CLOCK INPUTS
Input Bias Current
Input Low Voltage (VIL)
Input High Voltage (VIH)
VIN = ± 4 V; RIN = 50
CL/CL = –1.0 V
Full
25°C
Full
25°C
25°C
25°C, TMAX
TMIN
VI
VI
VI
V
V
VI
VI
Full VI
Full VI
Full VI
+2 ± 2.2
–8 ± 3
–16
± 22
1.2
350 800
200
4
–1.8
–1.0
–2 V
+8 µA
+16 µA
mA
pF
k
k
5 mA
–1.5 V
–0.8 V
TRACK MODE DYNAMICS
Bandwidth (–3 dB)
Slew Rate
Overdrive Recovery Time2 (to 0.1%)
2nd Harm. Dist. (20 MHz, 2 V p-p)
3rd Harm. Dist. (20 MHz, 2 V p-p)
Integrated Output Noise (1-200 MHz)
RMS Spectral Noise @ 10 MHz
VOUT 0.4 V p-p
4 V Step
4 V Step
VIN = ± 4 V to 0 V
Full
25°C
Full
25°C
Full
Full
25°C
25°C
IV 150 250
IV 550 850
IV 500
V 21
V –65
V –75
V 45
V 3.3
MHz
V/µs
V/µs
ns
dBc
dBc
µV
nV/Hz
HOLD MODE DYNAMICS
Worst Harmonic (2.3 MHz, 30 MSPS)
Worst Harmonic (12.1 MHz, 30 MSPS)
Worst Harmonic (12.1 MHz, 30 MSPS)
Worst Harmonic (12.1 MHz, 30 MSPS)
Worst Harmonic (19.7 MHz, 30 MSPS)
Hold Noise3
Droop Rate4
VOUT = 2 V p-p
VOUT = 2 V p-p
VOUT = 2 V p-p
VOUT = 2 V p-p
VOUT = 2 V p-p
VIN = 0 V
Feedthrough Rejection (20 MHz)
VIN = 2 V p-p
25°C
25°C
TMAX
TMIN
25°C
25°C
25°C
TMIN
TMAX
Full
V
IV
IV
IV
V
V
VI
VI
VI
V
–83
–80
–77
–74
300 ϫ tH
1
7
5
83
–72
–70
–68
10
40
30
dBfs
dBfs
dBfs
dBfs
dBfs
V/s rms
± mV/µs
± mV/µs
± mV/µs
dB
TRACK-TO-HOLD SWITCHING
Aperture Delay
Aperture Jitter
Pedestal Offset
Transient Amplitude
Settling Time to 1 mV
Glitch Product
VIN = 0 V
VIN = 0 V
VIN = 0 V
25°C
25°C
25°C
Full
Full
Full
25°C
V
+800
ps
V <1
ps
VI –8 ± 1
+8 mV
VI –10
+10 mV
V ± 6 mV
IV 7 10 ns
V 15
pV-s
HOLD-TO-TRACK SWITCHING
Acquisition Time to 0.1%
Acquisition Time to 0.01%
Acquisition Time to 0.01%
2 V Step
2 V Step
4 V Step
25°C
Full
25°C
V
IV
V
13 ns
16 23 ns
20 ns
POWER SUPPLY
Power Dissipation
+VS Current
–VS Current
Full VI
Full VI
Full VI
1.05 1.25 W
96 118 mA
116 132 mA
NOTES
1AD9100JD: 0°C to +70°C. AD9100AD: –40°C to +85°C. AD9100SD: –55°C to +125°C. DIP θJA = 38°C/W; this is valid with the device mounted flush to a
grounded 2 oz. copper clad board with 16 sq. inches of surface area and no air flow.
2The input to the AD9100 is internally clamped at ± 2.3 V. The internal input series resistance is nominally 50 .
3Hold mode noise is proportional to the length of time a signal is held. For example, if the hold time (t H) is 20 ns, the accumulated noise is typically 6 µV (300 V/s ϫ
20 ns). This value must be combined with the track mode noise to obtain total noise.
4Min and max droop rates are based on the military temperature range (–55 °C to +125°C). Refer to the “Droop Rate vs Temperature” chart for min/max limits over
the commercial and industrial ranges.
Specifications subject to change without notice.
–2– REV. B


Part Number AD9100
Description Ultrahigh Speed Monolithic Track-and-Hold
Maker Analog Devices
Total Page 12 Pages
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