1.8 V, Micro-Power,
8/10/12-Bit ADCs in 6 Lead SOT-23
Preliminary Technical Data
Specified for VDD of 1.8 V to 3.6 V
0.9 mW max at 60 kSPS with 3.6 V Supplies
0.4 mW max at 100 kSPS with 1.8 V Supplies
Fast Throughput Rate: 100 kSPS
Wide Input Bandwidth:
70dB SNR at 30 kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface
Standby Mode: 0.5 µA max
6-Lead SOT-23 Package and 8 lead µSOIC
Battery Powered Systems
Ramote Data Acquisition
Isolated Data Acquisition
The AD7466/AD7467/AD7468 are 12/10/8-bit, high
speed, low power, successive-approximation ADCs re-
spectively. The parts operate from a single 1.8 V to 3.6 V
power supply and feature throughput rates up to 100
kSPS. The parts contain a low-noise, wide bandwidth
track/hold amplifier which can handle input frequencies in
excess of 100 kHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to
interface with microprocessors or DSPs. The input signal
is sampled on the falling edge of CS and the conversion is
also initiated at this point. There are no pipelined delays
associated with the part.
The AD7466/AD7467/AD7468 use advanced design tech-
niques to achieve very low power dissipation at high
The reference for the part is taken internally from VDD.
This allows the widest dynamic input range to the ADC.
Thus the analog input range for the part is 0 to VDD. The
conversion rate is determined by the SCLK.
FUNCTIONAL BLOCK DIAGRAM
VIN T/H SUCCESSIVE
1. Specified for Supply voltages of 1.8 V to 3.6 V
2. 8/10/12-Bit ADCs in a SOT-23 package.
3. High Throughput with Low Power Consumption
4. Flexible Power/Serial Clock Speed Management
The conversion rate is determined by the serial clock
allowing the conversion time to be reduced through the
serial clock speed increase. Automatic power down after
conversion, which allows the average power cunsumption
to be reduced when in powerdown. Power consumption
is 0.5 µA max when in powerdown.
5. Reference derived from the power supply.
6. No Pipeline Delay
The part features a standard successive-approximation
ADC with accurate control of the conversions via a CS
REV. PrC 07/01
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Analog Devices, Inc., 2001