AS7C33128NTD32B sram equivalent, (as7c33128ntd32b / as7c33128ntd36b) 3.3v 128kx32/36 pipelined sram.
* Organization: 131,072 words × 32 or 36 bits
* NTD™ architecture for efficient bus operation
* Fast clock speeds to 200 MHz
* Fast clock to data access: .
requiring random access or read-modify-write operations.
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NTD™ devices use the memory bus m.
The AS7C33128NTD36B family is a high performance CMOS 4 Mbit synchronous Static Random Access Memory (SRAM) organized as 131,072 words × 32 or 36 bits and incorporates a LATE LATE Write. This variation of the 4Mb sychronous SRAM uses the No Turnaroun.
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