AS7C251MNTD18A sram equivalent, 2.5v 1m x 18 pipelined sram.
* Organization: 1,048,576 words × 18 bits
* NTD™architecture for efficient bus operation
* Fast clock speeds to 166 MHz
* Fast clock to data access: 3.5/3.
requiring random access or read-modify-write operations. NTD™ devices use the memory bus more efficiently by introducing.
The AS7C251MNTD18A family is a high performance CMOS 16-Mbit synchronous Static Random Access Memory (SRAM) organized as 1,048,576 words × 18 bits and incorporates a LATE LATE Write. This variation of the 16Mb+ synchronous SRAM uses the No Turnaround.
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