AS8C801801 srams equivalent, 3.3v synchronous zbt srams.
Pin Description Summar y
A0-A18 CE1, CE2, CE2 OE R/W CEN BW1, BW2, BW3, BW4 CLK ADV/ LD LBO ZZ I/O0-I/O31, I/OP1-I/OP4 VDD, V DDQ VSS Address Inputs Chip Enables Output .
* when ADV/LD is low, no new memory operation can be initiated. However, 4-word burst capability (interleaved or lin.
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