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Analog Devices Semiconductor Electronic Components Datasheet

AD5316 Datasheet

8-/10-/12-Bit DACs

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AD5316 pdf
2.5 V to 5.5 V, 400 μA, 2-Wire Interface,
Quad Voltage Output, 8-/10-/12-Bit DACs
AD5306/AD5316/AD5326
FEATURES
AD5306: 4 buffered, 8-bit DACs in 16-lead TSSOP
A version: ±1 LSB INL; B version: ±0.625 LSB INL
AD5316: 4 buffered, 10-bit DACs in 16-lead TSSOP
A version: ±4 LSB INL; B version: ±2.5 LSB INL
AD5326: 4 buffered, 12-bit DACs in 16-lead TSSOP
A version: ±16 LSB INL; B version: ±10 LSB INL
Low power operation: 400 μA @ 3 V, 500 μA @ 5 V
2-wire (I2C®-compatible) serial interface
2.5 V to 5.5 V power supply
Guaranteed monotonic by design over all codes
Power-down to 90 nA @ 3 V, 300 nA @ 5 V (PD pin or bit)
Double-buffered input logic
Buffered/unbuffered reference input options
Output range: 0 V to VREF or 0 V to 2 VREF
Power-on reset to 0 V
Simultaneous update of outputs (LDAC pin)
Software clear facility
Data readback facility
On-chip rail-to-rail output buffer amplifiers
Temperature range −40°C to +105°C
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
FUNCTIONAL BLOCK DIAGRAM
VDD
VREFA VREFB
AD5306/AD5316/AD5326
LDAC
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC A
VOUTA
SCL
SDA
A1
A0
LDAC
INTERFACE
LOGIC
POWER-ON
RESET
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC B
VOUTB
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC C
VOUTC
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC D
VOUTD
VREFD VREFC
POWER-DOWN
LOGIC
PD GND
Figure 1.
GENERAL DESCRIPTION
The AD5306/AD5316/AD53261 are quad 8-/10-/12-bit buffered
voltage output DACs in 16-lead TSSOP packages that operate
from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V.
Their on-chip output amplifiers allow rail-to-rail output swing
with a slew rate of 0.7 V/μs. A 2-wire serial interface, which
operates at clock rates up to 400 kHz, is used. This interface is
SMBus-compatible at VDD < 3.6 V. Multiple devices can be
placed on the same bus.
Each DAC has a separate reference input that can be configured
as buffered or unbuffered. The outputs of all DACs can be
updated simultaneously using the asynchronous LDAC input.
The parts incorporate a power-on reset circuit that ensures the
DAC outputs power up to 0 V and remain there until a valid
write to the device takes place. The software clear function
clears all DACs to 0 V. The parts contain a power-down feature
that reduces the current consumption of the device to
300 nA @ 5 V (90 nA @ 3 V).
All three parts have the same pinout, which allows users to select
the amount of resolution appropriate for their application without
redesigning their circuit board.
1 Protected by U.S. Patent Numbers 5,969,657 and 5,684,481.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.


Analog Devices Semiconductor Electronic Components Datasheet

AD5316 Datasheet

8-/10-/12-Bit DACs

No Preview Available !

AD5316 pdf
AD5306/AD5316/AD5326
TABLE OF CONTENTS
Specifications..................................................................................... 3
AC Characteristics........................................................................ 5
Timing Characteristics ................................................................ 6
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Terminology ...................................................................................... 9
Typical Performance Characteristics ........................................... 11
Functional Description .................................................................. 15
Digital-to-Analog Section ......................................................... 15
Resistor String ............................................................................. 15
DAC Reference Inputs ............................................................... 15
Output Amplifier........................................................................ 15
Power-On Reset .......................................................................... 16
Serial Interface ............................................................................ 16
Read/Write Sequence................................................................. 16
Pointer Byte Bits ......................................................................... 16
Input Shift Register..................................................................... 16
Default Readback Conditions................................................... 17
REVISION HISTORY
8/05—Rev. E to Rev. F
Replaced Figure 22 ......................................................................... 13
Changes to Bipolar Operation
Using the AD5306/AD5316/AD5326 Section........................ 20
Changes to Ordering Guide .......................................................... 24
5/05—Rev. D to Rev. E
Changes to Table 1............................................................................ 3
11/04—Rev. C to Rev. D
Change to Figure 31 ....................................................................... 16
Changes to Pointer Byte Section................................................... 16
Change to Figure 32 ....................................................................... 17
Multiple DAC Write Sequence ................................................. 17
Multiple DAC Readback Sequence .......................................... 17
Write Operation.......................................................................... 18
Read Operation........................................................................... 18
Double-Buffered Interface ........................................................ 19
Load DAC Input LDAC............................................................. 19
Power-Down Mode .................................................................... 19
Applications..................................................................................... 20
Typical Application Circuit....................................................... 20
Driving VDD from the Reference Voltage ................................ 20
Bipolar Operation Using the AD5306/AD5316/AD5326..... 20
Multiple Devices on One Bus ................................................... 20
AD5306/AD5316/AD5326 as a Digitally Programmable
Window Detector ....................................................................... 21
Coarse and Fine Adjustment Using the
AD5306/AD5316/AD5326 ....................................................... 21
Power Supply Decoupling ............................................................. 22
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
8/03—Rev. B to Rev. C
Added A Version ................................................................Universal
Changes to FEATURES ....................................................................1
Changes to SPECIFICATIONS .......................................................2
Changes to ABSOLUTE MAXIMUM RATINGS .........................5
Edits to ORDERING GUIDE ..........................................................5
Changes to TPC 21......................................................................... 11
Added OCTALS section to Table I............................................... 18
Updated OUTLINE DIMENSIONS ............................................ 19
4/01—Rev. A to Rev. B
Edit to Figure 6 ............................................................................... 13
Edits to RIGHT/LEFT section of Pointer Byte Bits section...... 13
Edits to Input Shift Register section ............................................ 13
Edits to Figure 7.............................................................................. 13
Edits to Figure 8.............................................................................. 14
Edits to Figure 9.............................................................................. 14
Edit to Figure 12 ............................................................................. 16
2/01—Rev. 0 to Rev. A
6/00—Revision 0: Initial Version
Rev. F | Page 2 of 24


Part Number AD5316
Description 8-/10-/12-Bit DACs
Maker Analog Devices
Total Page 24 Pages
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