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Analog Devices Semiconductor Electronic Components Datasheet

AD5311R Datasheet

10-Bit nanoDAC

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AD5311R pdf
Data Sheet
10-Bit nanoDAC with SPI/I2C Interface
and 2 ppm/°C On-Chip Reference
AD5310R/AD5311R
FEATURES
High relative accuracy (INL): ±0.5 LSB maximum
Low drift 2.5 V reference: 2 ppm/°C typical
Selectable span output: 2.5 V or 5 V
Total unadjusted error (TUE): 0.06% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.05% of FSR maximum
Low glitch: 0.1 nV-sec
High drive capability: 20 mA
Low power: 1.2 mW at 3.3 V
Independent logic supply: 1.8 V logic compatible
Wide operating temperature range: −40°C to +105°C
Robust 4 kV HBM ESD protection
APPLICATIONS
Process controls
Data acquisition systems
Digital gain and offset adjustment
Programmable voltage sources
Optical modules
GENERAL DESCRIPTION
The AD5310R/AD5311R, members of the nanoDAC® family, are
low power, single-channel, 10-bit buffered voltage output DACs.
The devices include an enabled by default internal 2.5 V
reference, and provides 2 ppm/°C. The output span can be
programmed to be 0 V to VREF or 0 V to 2 × VREF. All devices
operate from a single 2.7 V to 5.5 V supply and are guaranteed
monotonic by design. The devices are available in 10-lead
MSOP packages.
The internal power-on reset circuit of the AD5310R/AD5311R
ensures that the DAC register is written to zero scale at powerup
when the internal output buffer is configured in normal mode.
The devices contain a power-down mode that reduces the
current consumption of the device to 2 µA at 5 V.
The AD5310R/AD5311R use a versatile SPI or I2C interface,
including an asynchronous RESET pin and a VLOGIC pin that
provides 1.8 V compatibility.
LDAC
RESET
FUNCTIONAL BLOCK DIAGRAMS
VLOGIC
VREF
VDD
POWER-ON
RESET
DAC
REGISTER
2.5V
REF
REF
10-BIT
DAC
AD5310R
OUTPUT
BUFFER
VOUT
INPUT
CONTROL LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
SYNC SCLK SDI
GND
Figure 1. AD5310R
VLOGIC
VREF
VDD
LDAC
RESET
POWER-ON
RESET
DAC
REGISTER
2.5V
REF
REF
10-BIT
DAC
AD5311R
OUTPUT
BUFFER
VOUT
INPUT
CONTROL LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
SDA SCL
A0 GND
Figure 2. AD5311R
Table 1. Related Devices
Interface
Reference
SPI External
I2C External
12-Bit
AD5681R
10-Bit
AD53101
AD53111
1 The AD5310R and AD5311R are not pin-to-pin or software compatible with
the AD5310 and AD5311, respectively.
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL): ±0.5 LSB maximum.
2. Low Drift 2.5 V On-Chip Reference: 5 ppm/°C maximum
temperature coefficient.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2017 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com


Analog Devices Semiconductor Electronic Components Datasheet

AD5311R Datasheet

10-Bit nanoDAC

No Preview Available !

AD5311R pdf
AD5310R/AD5311R
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AC Characteristics........................................................................ 4
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Typical Performance Characteristics ........................................... 11
Terminology .................................................................................... 16
Theory of Operation ...................................................................... 17
Digital-to-Analog Converter .................................................... 17
REVISION HISTORY
2/2017—Rev. A to Rev. B
Changes to Features Section and Table 1 ...................................... 1
Changed 1.8 V ≤ VLOGIC ≤ 5.5 V (VLOGIC = 1.8 V to 5.5 V) to
1.62 V ≤ VLOGIC ≤ 5.5 V ...................................................................... 3
Changed 1.8 V ≤ VLOGIC ≤ VDD to 1.62 V ≤ VLOGIC ≤ 5.5 V ............ 4
Changes to VLOGIC Parameter, Table 2 ............................................ 4
Changed VLOGIC = 1.8 V to 5.5 V to 1.62 V ≤ VLOGIC ≤ 5.5 V ........ 5
Changes to Table 4 and Figure 3............................................................... 5
Changed VLOGIC = 1.8 V to 5.5 V to 1.62 V ≤ VLOGIC ≤ 5.5 V ........ 6
Changes to Table 8............................................................................ 9
Changes to Table 9.......................................................................... 10
Changes to Terminology Section.................................................. 16
Changes to Transfer Function Section......................................... 17
Data Sheet
Transfer Function....................................................................... 17
DAC Architecture....................................................................... 17
Serial Interface ................................................................................ 18
AD5310R SPI Serial Data Interface ......................................... 18
Daisy-Chain Mode Compatibility............................................ 18
AD5311R I2C Serial Data Interface.......................................... 19
Commands.................................................................................. 21
Load DAC (Hardware LDAC Pin) ........................................... 22
Hardware RESET........................................................................ 22
AD5311R, I2C Read Operation ................................................ 22
Thermal Hysteresis .................................................................... 23
Power-Up Sequence ................................................................... 23
Layout Guidelines....................................................................... 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
1/2014—Rev. 0 to Rev. A
Change to Features Section ..............................................................1
Removed Endnote 2, Endnote 3, Endnote 5, and Endnote 6,
Table 2; Renumbered Sequentially..................................................3
Removed Endnote 3, Table 3............................................................4
Removed Endnote 1, Table 4; Renumbered Sequentially ............5
Changes to Table 6.............................................................................8
Removed Solder Heat Reflow Section and Figure 44;
Renumbered Sequentially ............................................................. 23
1/2014—Revision 0: Initial Version
Rev. B | Page 2 of 24


Part Number AD5311R
Description 10-Bit nanoDAC
Maker Analog Devices
Total Page 24 Pages
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