74VHC02 - Quad 2-input NOR gate

Nexperia

General Description

The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7-A.

Key Features

Balanced propagation delays.
All inputs have a Schmitt-trigger action.
Inputs accept voltages higher than VCC.
Input levels:.
The 74VHC02 operates with CMOS input level.
The 74VHCT02 operates with TTL input level.
ESD protection:.
HBM JESD22-A114E exceeds 2000 V.
MM JESD22-A115-A exceeds 200 V.
CDM JESD22-C101C exceeds 1000 V.
Multiple package options.
Specified from -40 °C to +85 °C and.

📥 Download Datasheet

74VHC02 quad 2-input nor gate by Nexperia - Datasheet Preview

Datasheet Details

Part number	74VHC02
Manufacturer	Nexperia
File Size	220.83 KB
Description	Quad 2-input NOR gate
Datasheet	74VHC02 Datasheet

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Full PDF Text Transcription for 74VHC02 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for 74VHC02. For precise diagrams, tables, and layout, please refer to the original PDF.

74VHC02; 74VHCT02 Quad 2-input NOR gate Rev. 2 — 15 April 2020 Product data sheet 1. General description The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are...

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tion The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC02; 74VHCT02 provide a quad 2-input NOR function. 2.