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SN75LVDS86 - Receiver

Description

NC

The SN75LVDS86 FlatLink receiver contains three serial-in 7-bit parallel-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN75LVDS86 FlatLink RECEIVER SLLS268D − MARCH 1997 − REVISED JULY 2006 D 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput D Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI D Three Data Channels and Clock Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out D Operates From a Single 3.
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