Datasheet4U Logo Datasheet4U.com

SN74LVC1G08 - Single 2-Input Positive-AND Gate

Description

This single 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

B or Y = A + B in positive logic.

Features

  • 1 Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch.
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Provides Down Translation to VCC.
  • Max tpd of 3.6 ns at 3.3 V.
  • Low Power Consumption, 10-μA Max ICC.
  • ±24-mA Output Drive at 3.3 V.
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD P.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
SN74LVC1G125 high performance non-inverting buffer UMW
SN74LVC1G34 Single buffer UMW
SN74L71 AND-Gate R-S Master-Slave F-F National Semiconductor
SN74L74N Dual D-Type Flip-Flop ETC
SN74LS00 QUAD 2-INPUT NAND GATE Motorola

Other Datasheets by Texas Instruments

Part Number Description
SN74LVC1G08-EP Single 2-Input Positive-AND Gate
SN74LVC1G08-Q1 Single 2-Input Positive-AND Gate
SN74LVC1G0832 Single 3-Input Positive AND-OR Gate
SN74LVC1G00 Single 2-Input Positive-NAND Gate
SN74LVC1G00-EP SINGLE 2-INPUT POSITIVE-NAND GATE

Full PDF Text Transcription

Click to expand full text
Product Folder Order Now Technical Documents Tools & Software Support & Community SN74LVC1G08 SCES217Z – APRIL 1999 – REVISED MAY 2019 SN74LVC1G08 Single 2-Input Positive-AND Gate 1 Features •1 Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.6 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.
Published: |