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SN74ALS166 PARALLEL-LOAD 8-BIT SHIFT REGISTER
SDAS156D – APRIL 1982 – REVISED AUGUST 2000
D Synchronous Load D Direct Overriding Clear D Parallel-to-Serial Conversion D Package Options Include Plastic
Small-Outline (D) and Shrink Small-Outline (DB) Packages and Standard Plastic (N) DIP
description
The SN74ALS166 parallel-load 8-bit shift register is compatible with most other TTL logic families. All inputs are buffered to lower the drive requirements. Input clamping diodes minimize switching transients and simplify system design.
D, DB, OR N PACKAGE (TOP VIEW)
SER 1 A2 B3 C4 D5
CLK INH 6 CLK 7 GND 8
16 VCC 15 SH/LD 14 H 13 QH 12 G 11 F 10 E 9 CLR
These parallel-in or serial-in, serial-out registers have a complexity of 77 equivalent gates on the chip.