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DS92LV090A - 9-Channel Bus LVDS Transceiver

General Description

The DS92LV090A is one in a series of Bus LVDS transceivers designed specifically for the high speed, low power proprietary backplane or cable interfaces.

The device operates from a single 3.3V power supply and includes nine differential line drivers and nine receivers.

Key Features

  • 1.
  • 2 Bus LVDS Signaling.
  • 3.2 Nanosecond Propagation Delay Max.
  • Chip to Chip Skew ±800ps.
  • Low Power CMOS Design.
  • High Signaling Rate Capability (Above 100 Mbps).
  • 0.1V to 2.3V Common Mode Range for VID = 200mV.
  • ±100 mV Receiver Sensitivity.
  • Supports Open and Terminated Failsafe on Port Pins.
  • 3.3V Operation.
  • Glitch Free Power Up/Down (Driver & Receiver Disabled).
  • Light Bus Loading (5 pF Typical) per Bu.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS92LV090A www.ti.com SNLS025D – APRIL 2000 – REVISED APRIL 2013 DS92LV090A 9 Channel Bus LVDS Transceiver Check for Samples: DS92LV090A FEATURES 1 •2 Bus LVDS Signaling • 3.2 Nanosecond Propagation Delay Max • Chip to Chip Skew ±800ps • Low Power CMOS Design • High Signaling Rate Capability (Above 100 Mbps) • 0.1V to 2.3V Common Mode Range for VID = 200mV • ±100 mV Receiver Sensitivity • Supports Open and Terminated Failsafe on Port Pins • 3.