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DAC5675
SLAS352C − DECEMBER 2001 − REVISED AUGUST 2004
14ĆBIT, 400ĆMSPS DIGITAL-TO-ANALOG CONVERTER
FEATURES
D 400-MSPS Update Rate D LVDS-Compatible Input Interface D Spurious Free Dynamic Range (SFDR) to
Nyquist − 69 dBc at 70-MHz IF, 400 MSPS
D W-CDMA Adjacent Channel Power Ratio
ACPR − 73 dBc at 30.72-MHz IF, 122.88 MSPS − 71 dBc at 61.44-MHz IF, 245.76 MSPS
D Differential Scalable Current Outputs: 2 mA to
20 mA
D On-Chip 1.2-V Reference D Single 3.3-V Supply Operation D Power Dissipation: 820 at fclk = 400 MSPS,
fout = 70 MHz
D Package: 48-Pin HTQFP PowerPad,
TJA = 28.