CD74HCT238PW - High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Inverting/Noninverting
Texas Instruments
Download the CD74HCT238PW datasheet PDF.
This datasheet also covers the CD74HC138 variant, as both devices belong to the same high-speed cmos logic 3 to 8-line decoder/demultiplexer inverting/noninverting family and are provided as variant models within a single manufacturer datasheet.
General Description
The CDx4HC(T)138 and '238 are three to eight decoders with one standard output strobe (G2) and two active low output strobes (G 1 and G 0).
When the outputs are gated by any of the strobe inputs, they are all forced into the high state.
Key Features
Select one of eight data outputs:.
Active low for '138.
Active high for '238.
l/O port or memory selector.
Three enable inputs to simplify cascading.
Typical propagation delay of 13 ns at VCC = 5 V, CL = 15 pF, TA = 25°C.
Full PDF Text Transcription for CD74HCT238PW (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
CD74HCT238PW. For precise diagrams, and layout, please refer to the original PDF.
CD54HC138, CD74HC138, CD54HCT138, CD74HCT138, CD54HC238, CD74HC238, CD54HCT238, CD74HCT238 SCHS147J – NOVEMBER 1998 – REVISED NOVEMBER 2021 CDx4HC138, CDx4HCT138, CDx4HC2...
View more extracted text
– NOVEMBER 1998 – REVISED NOVEMBER 2021 CDx4HC138, CDx4HCT138, CDx4HC238, CDx4HCT238 High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting 1 Features • Select one of eight data outputs: – Active low for '138 – Active high for '238 • l/O port or memory selector • Three enable inputs to simplify cascading • Typical propagation delay of 13 ns at VCC = 5 V, CL = 15 pF, TA = 25°C • Fanout (over temperature range) – Bus driver outputs: 15 LSTTL loads – Standard outputs: 10 LSTTL loads • Wide operating temp range: -55°C to 125°C • Balanced propagation delay and transition times • Significant power re
CD74HCT238PW Datasheet
