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• Parallel 3-State I/O: Register Inputs/
Counter Outputs
• Counter Has Direct Overriding Load and
Clear
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
t• EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
74AC11593 8-BIT BINARY COUNTER WITH 3-STATE I/O INPUT REGISTERS
SCAS202 – MARCH 1992 – REVISED APRIL 1993
DW OR NT PACKAGE (TOP VIEW)
A/QA B/QB C/QC D/QD GND
GND
GND
GND
E/QE F/QF G/QG H/QH
1 2 3 4 5 6 7 8 9 10 11 12
24 CCK 23 CCLR 22 CCKEN 21 CCKEN 20 CLOAD 19 VCC 18 VCC 17 OE
16 OE
15 RCK 14 RCK 13 RCO
description
The 74AC11953 consists of a parallel input, an 8-bit s
74AC11593 Datasheet
