A3V56S30GTP - 256M Single Data Rate Synchronous DRAM

Product Overview

Zentel

Datasheet Details

Part number	A3V56S30GTP
Manufacturer	Zentel
File Size	0.99 MB
Description	256M Single Data Rate Synchronous DRAM
Datasheet	A3V56S30GTP Datasheet
Additional preview pages of the A3V56S30GTP datasheet.

Product details

Description

A3V56S30GTP is organized as 4-bank x 8,388,608-word x 8-bit Synchronous DRAM with LVTTL interface and A3V56S40GTP is organized as 4-bank x 4,194,304-word x 16-bit.

Features

- Single 3.3V ±0.3V power supply - Maximum clock frequency: -60:166MHz/-70:143MHz/-75:133MHz - Fully synchronous operation referenced to clock rising edge - 4-bank operation controlled by BA0, BA1 (Bank Address) - CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/FP (programmable) - Burst type- Sequential and interleave burst (programmable) - Byte Control- DQM (A3V56S30GTP), LDQM and UDQM (A3V56S40GTP) - Random column access - Auto precharge / All bank precharge contro.

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Published: Sep 1, 2015 |