Description
A3V28S30FTP is organized as 4-bank x 4,194,304-word x 8-bit Synchronous DRAM with LVTTL interface and A3V28S40FTP is organized as 4-bank x 2,097,152-word x 16-bit.
Features
- - Single 3.3V ±0.3V power supply - Maximum clock frequency : - 6:166MHz/-7:143MHz/-75:133MHz - Fully synchronous operation referenced to clock rising edge - 4-bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/FP (programmable) - Burst type- Sequential and interleave burst (programmable) - Byte Control- DQM (A3V28S30FTP), DQML and DQMU (A3V28S40FTP) - Random column access - Auto precharge / All bank precharge contr.