Datasheet Details
| Part number | MT9045 |
|---|---|
| Manufacturer | Zarlink Semiconductor |
| File Size | 381.93 KB |
| Description | T1/E1/OC3 System Synchronizer |
| Datasheet |
 MT9045 Datasheet
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General Description
The MT9045 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/OC3 links.
Key Features
- Supports AT&T TR62411 and Bellcore GR-1244CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces.
- Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces.
- Supports ITU-T G.812 Type IV clocks for 1,544 kbit/s interfaces and 2,048 kbit/s interfaces.
- Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces.
- Selectable 19.44 MHz, 1.544 MHz, 2.048 MHz or 8kHz input reference signals.
- Provides C1.5,.