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MT9043 - T1/E1 System Synchronizer

General Description

The MT9043 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links.

Key Features

  • Supports AT&T TR62411 and Bellcore GR-1244CORE, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces Selectable 19.44 MHz, 1.544MHz, 2.048MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals Provides 5 different styles of 8 KHz framing pulses Attenuates wander from 1.9Hz Fast lock mode Provides Time Interval Error (TIE) correc.

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Datasheet Details

Part number MT9043
Manufacturer Zarlink Semiconductor
File Size 453.05 KB
Description T1/E1 System Synchronizer
Datasheet download datasheet MT9043 Datasheet

Full PDF Text Transcription for MT9043 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for MT9043. For precise diagrams, and layout, please refer to the original PDF.

MT9043 T1/E1 System Synchronizer Data Sheet Features • Supports AT&T TR62411 and Bellcore GR-1244CORE, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports...

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E, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces Selectable 19.44 MHz, 1.544MHz, 2.048MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals Provides 5 different styles of 8 KHz framing pulses Attenuates wander from 1.