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XCR3128A - CPLD with Enhanced Clocking

Description

The XCR3128A CPLD (Complex Programmable Logic Device) is a member of the CoolRunner® family of CPLDs from Xilinx.

These devices combine high speed and zero power in a 128 macrocell CPLD.

Features

  • Industry's first TotalCMOS™ PLD - both CMOS design and process technologies Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed 3V, In-System Programmable (ISP) using a JTAG interface - On-chip supervoltage generation - ISP commands include: Enable, Erase, Program, Verify - Supported by multiple ISP programming platforms - 4-pin JTAG interface (TCK, TMS, TDI, TDO) - JTAG commands include: Bypass, Idcode High-speed pin-to-pin delays o.

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Full PDF Text Transcription

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APPLICATION NOTE 0  XCR3128A: 128 Macrocell CPLD with Enhanced Clocking 0 14* DS035 (v1.2) August 10, 2000 Product Specification Features • • • Industry's first TotalCMOS™ PLD - both CMOS design and process technologies Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed 3V, In-System Programmable (ISP) using a JTAG interface - On-chip supervoltage generation - ISP commands include: Enable, Erase, Program, Verify - Supported by multiple ISP programming platforms - 4-pin JTAG interface (TCK, TMS, TDI, TDO) - JTAG commands include: Bypass, Idcode High-speed pin-to-pin delays of 7.
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