ST1004SRG
DESCRIPTION
ST1004SRG is the N-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. The process is especially to improve the overall efficiency of DC/DC conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(on) and fast switching speed.
PIN CONFIGURATION SOT-23
FEATURE
100V/1.0A, RDS(ON) = 310mΩ @VGS = 10V
Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23 package design
1.Gate 2.Source 3.Drain
PART MARKING SOT-23
104YA
Y: Year Code A: Process Code
STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA .stansontech.
ST1004SRG 2013. V1
N Channel Enhancement Mode MOSFET
2.0A
ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted )
Parameter
Symbol Typical
Drain-Source Voltage Gate-Source Voltage Continuous Drain Current=150℃) Pulsed Drain...
