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SDA9254-2 - 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter

General Description

General The SDA 9254-2 is a combination of the TV-SAM SDA 9253 and an adaptive recursive filter to achieve a reduction of noise for video signals.

To get a closed loop one of the two output ports of the triple port memory is connected internally to the noise reduction filter.

Key Features

  • q q q q q q q q q SDA 9254-2 CMOS IC q q q q q q q q q q q q Stores a complete video field (4:1:1) On chip adaptive recursive noise reduction filter (4:1:1) 4 noise reduction classes selectable Special noise reduction mode for 4:2:2.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter Preliminary Data Features q q q q q q q q q SDA 9254-2 CMOS IC q q q q q q q q q q q q Stores a complete video field (4:1:1) On chip adaptive recursive noise reduction filter (4:1:1) 4 noise reduction classes selectable Special noise reduction mode for 4:2:2 applications 212 × 64 × 16 × 12-bit organization Triple port architecture One 16 × 12-bit input shift register Two 16 × 12-bit output shift registers Shift registers independently and simultaneously accessible (one output shift register is used internally for noise reduction filtering) Continuous data flow even at maximum speed 40-MHz shift rate - 0.