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LC3564RT-15LV - 64K (8192 words x 8 bits) SRAM

Features

  • s Supply voltage range: 2.0 to 3.6V.
  • 3V operation: 2.7 to 3.6V.
  • Battery operation: 2.0 to 2.4V s High-speed access time.
  • 3V operation - LC3564RM,RT-10LV: 100ns (max) - LC3564RM,RT-12LV: 120ns (max) - LC3564RM,RT-15LV: 150ns (max).
  • Battery operation - LC3564RM,RT-10LV: 200ns (max) - LC3564RM,RT-12LV: 250ns (max) - LC3564RM,RT-15LV: 300ns (max) unit: mm 3221 - TSOP28 [LC3564RT] s Very-low standby current.
  • 3V operation - Ta ≤ 70°C: 1.0µA - Ta ≤ 85°.

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Other Datasheets by SANYO (now Panasonic)

Part Number Description
LC3564RT-10LV 64K (8192 words x 8 bits) SRAM
LC3564RT-12LV 64K (8192 words x 8 bits) SRAM
LC3564RM 64K (8192 words x 8 bits) SRAM
LC3564B 64K (8192-word 8-bit) SRAM
LC3564BM 64K (8192-word 8-bit) SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Ordering number: EN 4484B CMOS LSI LC3564RM,RT-10LV/12LV/15LV 64K (8192 words × 8 bits) SRAM Overview The LC3564RM,RT are 8192-word × 8bit, asynchronous, silicon gate, low-voltage CMOS SRAM LSIs.They operate from a 2.0 to 3.6V supply, making them ideal for handheld, battery-operated equipment. They are fully CMOS devices employing 2-layer A1 wiring to realize high-speed access, low operating current consumption and very low standby current. They incorporate control signal inputs; OE for high-speed memory access, and 2 chip enables CE1 and CE2 for power-down and device selection. They are ideal for systems requiring high speed, low power and battry backup or for easy mamory expansion. The very low standby current means that backup can also be achieved using a capacitor.
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