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K4S280432B - 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL

General Description

The K4S280432B is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Key Features

  • JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4 & 8 Page ) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (4K Cycle) CMOS SDRAM.

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Full PDF Text Transcription for K4S280432B (Reference)

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K4S280432B CMOS SDRAM 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL Revision 0.0 Aug. 1999 * Samsung Electronics reserves the right to change products or speci...

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9 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.0 Aug. 1999 K4S280432B 8M x 4Bit x 4 Banks Synchronous DRAM FEATURES • • • • JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4 & 8 Page ) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock.