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K4M51163LC - 8M x 16Bit x 4 Banks Mobile SDRAM

General Description

The K4M51163LC is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technology.

Key Features

  • VDD/VDDQ = 2.5V/2.5V.
  • LVCMOS compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
  • EMRS cycle with address key programs.
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • Special Function Support. -. PASR (Par.

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Full PDF Text Transcription for K4M51163LC (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for K4M51163LC. For precise diagrams, and layout, please refer to the original PDF.

www.DataSheet4U.com K4M51163LC - R(B)N/G/L/F 8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA FEATURES • VDD/VDDQ = 2.5V/2.5V • LVCMOS compatible with multiplexed address. • F...

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VDD/VDDQ = 2.5V/2.5V • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) • DQM for masking. • Auto refresh. • 64ms refresh period (8K cycle). • Commercial Temperature Operation (-25°C ~ 7

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