Datasheet4U Logo Datasheet4U.com

M48Z58 - 64-Kbit SRAM

General Description

The M48Z58/Y ZEROPOWER® RAM is an 8 Kbit x 8 non-volatile static RAM that integrates powerfail deselect circuitry and battery control logic on a single die.

The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory solution.

Key Features

  • Integrated, ultra low power SRAM, power-fail control circuit, and battery.
  • READ cycle time equals WRITE cycle time.
  • Automatic power-fail chip deselect and WRITE protection.
  • WRITE protect voltages: (VPFD = power-fail deselect voltage).
  • M48Z35: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V.
  • M48Z35Y: 4.5 to 5.5 V; 4.2 V ≤ VPFD ≤ 4.5 V.
  • Self-contained battery in the CAPHAT™ DIP package.
  • Packaging includes a 28-lead SOIC and SNAPHA.

📥 Download Datasheet

More Datasheets from STMicroelectronics

Part Number Description
M48Z58Y 64-Kbit SRAM
M48Z512AV 4 Mbit (512 Kbit x 8) ZEROPOWER SRAM
M48Z512BV 4-Mbit SRAM
M48Z19 CMOS 8K x 8 ZEROPOWER SRAM
M48Z2M1V 16 Mbit (2 Mb x 8) ZEROPOWER SRAM
M48Z30Y CMOS 32K x 8 ZEROPOWER SRAM
M48Z35 256-Kbit SRAM
M48Z35Y 256-Kbit SRAM
M48T08Y 64 Kbit 8Kb x 8 TIMEKEEPER SRAM
M48T129V 1Mbit (128 Kbit x 8) TIMEKEEPER SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
M48Z58, M48Z58Y 5 V, 64 Kbit (8 Kbit x 8) ZEROPOWER® SRAM Datasheet - production data 28 1 PDIP 28.7 Battery CAPHAT™ SNAPHAT® battery 28 1 SOH28 Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery • READ cycle time equals WRITE cycle time • Automatic power-fail chip deselect and WRITE protection • WRITE protect voltages: (VPFD = power-fail deselect voltage) • M48Z35: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V • M48Z35Y: 4.5 to 5.5 V; 4.2 V ≤ VPFD ≤ 4.