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M48Z512AV - 4 Mbit (512 Kbit x 8) ZEROPOWER SRAM

Download the M48Z512AV datasheet PDF. This datasheet also covers the M48Z512A variant, as both devices belong to the same 4 mbit (512 kbit x 8) zeropower sram family and are provided as variant models within a single manufacturer datasheet.

General Description

The M48Z512A/Y/V ZEROPOWER® RAM is a non-volatile, 4,194,304-bit static RAM organized as 524,288

Key Features

  • Integrated, ultra low power SRAM, power-fail control circuit, and battery.
  • Conventional SRAM operation; unlimited )WRITE cycles t(s.
  • 10 years of data retention in the absence of cpower du.
  • Automatic power-fail chip deselect and WRITE roprotection P.
  • Two WRITE protect voltages: te(VPFD = power-fail deselect voltage) le.
  • M48Z512A: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V so.
  • M48Z512AY: VCC = 4.5 to 5.5 V; b4.2 V ≤ VPFD ≤ 4.5 V O.
  • M48Z512AV: VCC =.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (M48Z512A_STMicroelectronics.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
M48Z512A 4 Mbit (512 Kbit x 8) ZEROPOWER SRAM ST Microelectronics
M48Z512AY 4 Mbit (512 Kbit x 8) ZEROPOWER SRAM ST Microelectronics
M48Z02 16 Kbit (2 Kb x 8) ZEROPOWER SRAM ST Microelectronics
M48Z08 64 Kbit (8 Kb x 8) ZEROPOWER SRAM ST Microelectronics
M48Z09 CMOS 8K x 8 ZEROPOWER SRAM ST Microelectronics

Other Datasheets by STMicroelectronics

Part Number Description
M48Z512BV 4-Mbit SRAM
M48Z58 64-Kbit SRAM
M48Z58Y 64-Kbit SRAM
M48Z19 CMOS 8K x 8 ZEROPOWER SRAM
M48Z2M1V 16 Mbit (2 Mb x 8) ZEROPOWER SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
M48Z512A M48Z512AY, M48Z512AV 4 Mbit (512 Kbit x 8) ZEROPOWER® SRAM Not recommended for new design Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited )WRITE cycles t(s■ 10 years of data retention in the absence of cpower du■ Automatic power-fail chip deselect and WRITE roprotection P■ Two WRITE protect voltages: te(VPFD = power-fail deselect voltage) le– M48Z512A: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V so– M48Z512AY: VCC = 4.5 to 5.5 V; b4.2 V ≤ VPFD ≤ 4.5 V O– M48Z512AV: VCC = 3.0 to 3.6 V; -2.8 V ≤ VPFD ≤ 3.