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BU90R104 - 35bit LVDS Receiver

Description

The BU90R104 receiver operates from 8MHz to 112MHz wide clock range.

The BU90R104 converts the LVDS serial data streams back into 35bits of LVCMOS parallel data.

Data is transmitted seven times (7X) stream and reduce the cable number by 3(1/3) or less.

Features

  • >.
  • 5 channels of LVDS data stream are converted to 35bits data of parallel LVCMOS level outputs.
  • 30bits of RGB output data, 5bits of timing and control output data(HSYNC, VSYNC, DE, CTL1 and CTL2) are transmitted available.
  • Support clock frequency from 8MHz up to 112MHz.
  • Support consumer video format including 480i, 480P, 720P and 1080i as well.
  • Support many kinds of PC video formats such as VGA, SVGA, XGA and SXGA.
  • Provide 784Mbps per 1ch or 3.92Gbps per device throughpu.

📥 Download Datasheet

Datasheet Details

Part number BU90R104
Manufacturer ROHM
File Size 532.81 KB
Description 35bit LVDS Receiver
Datasheet download datasheet BU90R104 Datasheet

Full PDF Text Transcription

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Datasheet LVDS Interface LSI 35bit LVDS Receiver 5:35 DeSerializer BU90R104 ●General Description The BU90R104 receiver operates from 8MHz to 112MHz wide clock range. The BU90R104 converts the LVDS serial data streams back into 35bits of LVCMOS parallel data. Data is transmitted seven times (7X) stream and reduce the cable number by 3(1/3) or less. I/O Voltage range is 2.3 to 3.6V,so it is available for many products. ●Key Specifications ■Supply Voltage Range ■Operating Frequency ■Operating Temperature Range 2.30 to 3.60 V 8 to 112 MHz -40 to +85 ℃ ●Packages TQFP64V 12.0mm×12.0mm×1.0mm ●Applications ■Flat panel display ■Security camera, Digital camera ■Tablet ●Features ■5 channels of LVDS data stream are converted to 35bits data of parallel LVCMOS level outputs.
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