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SLG74190 - 1 to 19 Differential Clock Buffer

Description

Pin # Name 1 VDDA 2 GNDA 3 IREF 4 100M_133M# 5 HBW_BYPASS_LBW# 6 PWRGD/PWRDN# 7 GND 8 VDD 9 CLK_IN 10 CLK_IN# 11 SA_0 12 SDA 13 SCL 14 SA_1 15 FB_IN 16 FB_IN# 17 FB_OUT# 18 FB_OUT 19 DIF_0 20 DIF_0# 21 VDD 22 DIF_1 23 DIF_1# 24 DIF_2 25 DIF_2# 26 GND 27 DIF_3 28 DIF_3# 29 DIF_4 Type PWR GND I I I I

Features

  • Intel DB1900Z Clock Specification Revision 1.0.
  • 1:19 Differential Zero Delay Buffer.
  • PCIe Gen 2/Gen3 & Intel ® QPI.
  • 100ps Input to Output Delay.
  • HCSL Output Buffer.
  • Configuration PLL (ZDB) and Bypass Mode.
  • Programmable PLL Bandwidth.
  • 72 pin QFN package (6/6 RoHS Compliant) SLG74190 1 to 19 Differential Clock Buffer Output Summary.
  • 19 - differential clock output pairs @ 0.7V.
  • 8 - OE# input pins to control.

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Datasheet Details

Part number SLG74190
Manufacturer Renesas
File Size 667.46 KB
Description 1 to 19 Differential Clock Buffer
Datasheet download datasheet SLG74190 Datasheet
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Features • Intel DB1900Z Clock Specification Revision 1.0 • 1:19 Differential Zero Delay Buffer • PCIe Gen 2/Gen3 & Intel ® QPI • 100ps Input to Output Delay • HCSL Output Buffer • Configuration PLL (ZDB) and Bypass Mode • Programmable PLL Bandwidth • 72 pin QFN package (6/6 RoHS Compliant) SLG74190 1 to 19 Differential Clock Buffer Output Summary • 19 - differential clock output pairs @ 0.
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