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R5F11MPG - MCU

Features

  • Ultra-low power consumption technology.
  • VDD = single power supply voltage of 1.8 to 3.6 V.
  • HALT mode.
  • STOP mode.
  • SNOOZE mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • Minimum instruction execution time: Can be changed from high speed (0.04167 s: @ 24 MHz operation with high-speed on-chip oscillator clock) to ultra-low speed (30.5 s: @ 32.768 kHz operation with subsystem clock).
  • Multiply/divide and multiply/accumulate.

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Full PDF Text Transcription

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Datasheet RL78/L1A R01DS0280EJ0110 RENESAS MCU  Rev.1.10 Sep 30, 2019 Integrated LCD controller/driver, 12-bit resolution A/D Converter, 12-bit resolution D/A Converter, Operational amplifier, Internal reference voltage for A/D and D/A converters. True Low Power Platform (as low as 70.8 μA/MHz, and 0.68 μA in Halt mode( RTC2 + LVD)), 1.8 V to 3.6 V operation, 48 to 128 Kbyte Flash, 33 DMIPS at 24 MHz, for All LCD Based Applications. 1. OUTLINE 1.1 Features Ultra-low power consumption technology • VDD = single power supply voltage of 1.8 to 3.6 V • HALT mode • STOP mode • SNOOZE mode RL78 CPU core • CISC architecture with 3-stage pipeline • Minimum instruction execution time: Can be changed from high speed (0.
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