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MPC9893 - 3.3V 1:12 LVCMOS PLL Clock Generator

General Description

The MPC9893 is a 3.3 V or 2.5 V compatible PLL clock driver and clock generator.

The clock generator uses a fully integrated PLL to generate clock signals from redundant clock sources.

The PLL multiplies the input reference clock signal by one, two, three, four or eight.

Key Features

  • 12-output LVCMOS PLL clock generator.
  • 2.5 V and 3.3 V compatible.
  • IDCS - on-chip intelligent dynamic clock switch.
  • Automatically detects clock failure.
  • Smooth output phase transition during clock failover switch.
  • 7.5.
  • 200 MHz output frequency range.
  • LVCMOS compatible inputs and outputs.
  • External feedback enables zero-delay configurations.
  • Supports networking, telecommunications and computer.

📥 Download Datasheet

Datasheet Details

Part number MPC9893
Manufacturer Renesas
File Size 446.50 KB
Description 3.3V 1:12 LVCMOS PLL Clock Generator
Datasheet download datasheet MPC9893 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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3.3V 1:12 LVCMOS PLL Clock Generator MPC9893 PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES SEPTEMBER 7, 2016 DATASHEET The MPC9893 is a 2.5 V and 3.3 V compatible, PLL based intelligent dynamic clock switch and generator specifically designed for redundant clock distribution systems. The device receives two LVCMOS clock signals and generates 12 phase aligned output clocks. The MPC9893 is able to detect a failing reference clock signal and to dynamically switch to a redundant clock signal. The switch from the failing clock to the redundant clock occurs without interruption of the output clock signal (output clock slews to alignment). The phase bump typically caused by a clock failure is eliminated.