Datasheet Details
| Part number | MPC9824 |
|---|---|
| Manufacturer | Renesas |
| File Size | 420.76 KB |
| Description | Clock Generator |
| Datasheet |
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The MPC9824 uses a PLL with a 25 MHz input reference frequency to generate a single bank of 6 configurable LVCMOS output clocks.
The output frequency of this bank is configurable by three FSEL pins.
The 25 MHz reference may be either an external frequency source or a 25 MHz crystal.
| Part number | MPC9824 |
|---|---|
| Manufacturer | Renesas |
| File Size | 420.76 KB |
| Description | Clock Generator |
| Datasheet |
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| Part Number | Description |
|---|---|
| MPC9893 | 3.3V 1:12 LVCMOS PLL Clock Generator |
| MPC940L | LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP |
| MPC9446 | LVCMOS Clock Fanout Buffer |
| MPC9447 | LVCMOS Clock Fanout Buffer |
| MPC94551 | Low Voltage 1:4 CMOS Clock Buffer |
| MPC962305 | 3.3V Zero Delay Buffer |
| MPC9772 | 3.3V 1:12 LVCMOS PLL Clock Generator |
| MPC9773 | LVCMOS PLL Clock Generator |
The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.