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IDT72275 - CMOS SuperSync FIFO

Description

Master Reset clears entire FIFO The IDT72275/72285 are exceptionally deep, high speed, CMOS First-In- Partial Reset clears data, but retains programmable settings Retransmit operation with fixed, low first word data T R latency time Empty, Full and Half-Fu

Features

  • Independent Read and Write Clocks (permit reading and writing.
  • Choose among the following memory organizations: IDT72275.
  • 32,768 x 18 IDT72285.
  • 65,536 x 18.
  • Pin-compatible with the IDT72255LA/72265LA SuperSync FIFOs.
  • 10ns read/write cycle time (6.5ns access time) simultaneously).
  • Available in the 64-pin Thin Quad Flat Pack (TQFP) and the 64- pin Slim Thin Quad Flat Pack (STQFP).
  • High-performance submicron CMOS technolog.

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Datasheet Details

Part number IDT72275
Manufacturer Renesas
File Size 843.27 KB
Description CMOS SuperSync FIFO
Datasheet download datasheet IDT72275 Datasheet

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Full PDF Text Transcription

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CMOS SuperSync FIFO™ 32,768 x 18 65,536 x 18 IDT72275 IDT72285 OBSOLETE PARTS FEATURES: • Independent Read and Write Clocks (permit reading and writing • Choose among the following memory organizations: IDT72275 — 32,768 x 18 IDT72285 — 65,536 x 18 • Pin-compatible with the IDT72255LA/72265LA SuperSync FIFOs • 10ns read/write cycle time (6.
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