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HD74LS174 / HD74LS175
Hex / Quadruple D-type Flip-Flops (with clear)
REJ03D0451–0300 Rev.3.00
Jul.15.2005
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the HD74LS175 features complementary outputs from each flip-flops. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the outputs.
HD74LS174P Datasheet
