9QXL2001B - PCIe Clock Buffer

Description

The 9QXL2001B is a 20-output very-low-additive phase jitter fanout buffer for PCIe Gen4, Gen5 and UPI applications.

The 9QXL2001B provides two methods to control output enables; standard OE# pins and SMBus enable bits, or a simple 3-wire serial interface that is independent of the SMBus.

Features

Two Output Enable Control modes:.
Traditional 8 OE# pins allow hardware control of 8 outputs and 20 SMBus bits allow software control of each output.
Simple 3-wire Side-Band Interface allows real-time control of all 20 outputs.
Outputs remain Low/Low when powered up with floating input clock.
Low-Power HCSL (LP-HCSL) outputs:.
Zo = 85Ω outputs eliminate 80 resistors, saving 130mm2 of area.
Power consumption reduced by 50%.
Nine selectable.

Renesas

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Datasheet Details

Part number	9QXL2001B
Manufacturer	Renesas
File Size	808.96 KB
Description	PCIe Clock Buffer
Datasheet	9QXL2001B Datasheet
Additional preview pages of the 9QXL2001B datasheet.

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Full PDF Text Transcription

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20-Output DB2000QL 9QXL2001B Datasheet Description The 9QXL2001B is a 20-output very-low-additive phase jitter fanout buffer for PCIe Gen4, Gen5 and UPI applications. The 9QXL2001B provides two methods to control output enables; standard OE# pins and SMBus enable bits, or a simple 3-wire serial interface that is independent of the SMBus. The OE Control Mode is set via a hardware strap. It offers integrated terminations for 85Ω transmission lines.

Published: Sep 25, 2023 |