8413S12B - HCSL/ LVCMOS Clock Generator

Datasheet Summary

Description

The 8413S12B is a PLL-based clock generator.

This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks and the clocks for both the Gigabit Ethernet MAC and PHY.

Features

Ten selectable 100MHz, 125MHz, 156.25MHz and 312.5MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels.
One single-ended QG LVCMOS/LVTTL clock output at 125MHz.
One single-ended QF LVCMOS/LVTTL clock output at 50MHz, 15 output impedance.
Two single-ended QREFx LVCMOS/LVTTL outputs at 25MHz, 15 output impedance.
Selectable external crystal or differential (single-ended) input source.
Crystal oscillator interface designed for 25MH.

Renesas

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Datasheet Details

Part number	8413S12B
Manufacturer	Renesas
File Size	0.99 MB
Description	HCSL/ LVCMOS Clock Generator
Datasheet	8413S12B Datasheet
Additional preview pages of the 8413S12B datasheet.

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Full PDF Text Transcription

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HCSL/ LVCMOS Clock Generator 8413S12B General Description The 8413S12B is a PLL-based clock generator. This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks and the clocks for both the Gigabit Ethernet MAC and PHY. The clock generator offers ultra low-jitter, low-skew clock outputs. The output frequencies are generated from a 25MHz external input source or an external 25MHz parallel resonant crystal. The industrial temperature range of the 8413S12B supports telecommunication, networking, and storage requirements. Applications • CPE Gateway Design • Home Media Servers • 802.

Published: Jun 4, 2020 |