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74FCT38075S - Low Skew 1 to 5 Clock Buffer

Datasheet Summary

Description

The 74FCT38075S is a low skew, single input to five output, clock buffer.

The 74FCT38075S has best in class additive phase Jitter of sub 50 fsec.

IDT makes many non-PLL and PLL based low output skew devices as well as Zero Delay Buffers to synchronize clocks.

Features

  • Extremely low RMS Additive Phase Jitter: 50fs.
  • Low output skew: 50ps.
  • Packaged in 8-pin SOIC and 8-pin DFN.
  • Pb (lead) free package.
  • Low power CMOS technology.
  • Operating voltages of 1.8V to 3.3V.
  • Extended temperature range (-40°C to +105°C) Block Diagram ICLK Q0 Q1 Q2 Q3 Q4 74FCT38075S.

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Datasheet Details

Part number 74FCT38075S
Manufacturer Renesas
File Size 282.02 KB
Description Low Skew 1 to 5 Clock Buffer
Datasheet download datasheet 74FCT38075S Datasheet
Additional preview pages of the 74FCT38075S datasheet.

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Full PDF Text Transcription

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Low Skew 1 to 5 Clock Buffer 74FCT38075S DATASHEET Description The 74FCT38075S is a low skew, single input to five output, clock buffer. The 74FCT38075S has best in class additive phase Jitter of sub 50 fsec. IDT makes many non-PLL and PLL based low output skew devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features • Extremely low RMS Additive Phase Jitter: 50fs • Low output skew: 50ps • Packaged in 8-pin SOIC and 8-pin DFN • Pb (lead) free package • Low power CMOS technology • Operating voltages of 1.8V to 3.3V • Extended temperature range (-40°C to +105°C) Block Diagram ICLK Q0 Q1 Q2 Q3 Q4 74FCT38075S REVISION A 03/18/15 1 ©2015 Integrated Device Technology, Inc.
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