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74FCT38072S - Low Skew 1 to 2 Clock Buffer

Datasheet Summary

Description

The 74FCT38072S is a low skew, single input to two output, clock buffer.

The 74FCT38072S has best in class additive phase Jitter of sub 50 fsec.

Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks.

Features

  • Low additive phase jitter RMS: 50fs.
  • Extremely low skew outputs (50ps).
  • Low cost clock buffer.
  • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free.
  • Input/Output clock frequency up to 200 MHz.
  • Low power CMOS technology.
  • Operating voltages of 1.8V to 3.3V.
  • Extended temperature range (-40° to +105°C) Block Diagram Q0 ICLK Q1 74FCT38072S.

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Datasheet Details

Part number 74FCT38072S
Manufacturer Renesas
File Size 529.58 KB
Description Low Skew 1 to 2 Clock Buffer
Datasheet download datasheet 74FCT38072S Datasheet
Additional preview pages of the 74FCT38072S datasheet.

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Full PDF Text Transcription

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Low Skew 1 to 2 Clock Buffer 74FCT38072S DATASHEET Description The 74FCT38072S is a low skew, single input to two output, clock buffer. The 74FCT38072S has best in class additive phase Jitter of sub 50 fsec. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features • Low additive phase jitter RMS: 50fs • Extremely low skew outputs (50ps) • Low cost clock buffer • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free • Input/Output clock frequency up to 200 MHz • Low power CMOS technology • Operating voltages of 1.8V to 3.
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