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HD74LS165AP - Parallel-Load 8-bit Shift Register

Download the HD74LS165AP datasheet PDF. This datasheet also covers the HD74LS165A variant, as both devices belong to the same parallel-load 8-bit shift register family and are provided as variant models within a single manufacturer datasheet.

Features

  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS165AP DILP-16 pin PRDP0016AE-B (DP-16FV) P HD74LS165AFPEL SOP-16 pin (JEITA) PRSP0016DH-B FP (FP-16DAV) Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity).
  • EL (2,000 pcs/reel) Pin Arrangement Shift/ Load 1 Clock 2 E3 F4 Parallel Inputs G 5 H6 Output QH 7 GND 8 Shift/Load CK Clock Inhibit E D F C.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD74LS165A_RenesasTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HD74LS165AP
Manufacturer Renesas
File Size 121.29 KB
Description Parallel-Load 8-bit Shift Register
Datasheet download datasheet HD74LS165AP Datasheet

Full PDF Text Transcription

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www.DataSheet4U.com HD74LS165A Parallel-Load 8-bit Shift Register REJ03D0449–0300 Rev.3.00 Jul.15.2005 The LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual direct data inputs that are enabled by a low level at the shift / load input. These registers also feature gated clock inputs and complementary outputs from the eighth bit. All inputs are diode-clamped to minimize transmission-line effects, thereby simplifying system design. Clocking is accomplished through a 2-input positive-NOR gate, permitting one input to be used as a clock-inhibit function.
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