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SSTV16859 - 2.5 V 13-bit to 26-bit SSTL_2 registered buffer

Description

The SSTV16859 is a 13-bit to 26-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V.

VDD, except the LVCMOS reset (RESET) input.

Features

  • Stub-series terminated logic for 2.5 V VDD (SSTL_2).
  • Optimized for stacked DDR (Double Data Rate) SDRAM.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS SSTV16859 2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM Product data 2000 Dec 01 File under Integrated Circuits — ICL03 2002 Feb 19 Philips Semiconductors Philips Semiconductors Product data 2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM SSTV16859 FEATURES • Stub-series terminated logic for 2.5 V VDD (SSTL_2) • Optimized for stacked DDR (Double Data Rate) SDRAM applications DDR (Double Data Rate) SDRAM and SDRAM II Memory Modules. Different from traditional SDRAM, DDR SDRAM transfers data on both clock edges (rising and falling), thus doubling the peak bus bandwidth. A DDR DRAM rated at 133 MHz will have a burst rate of 266 MHz. The device data inputs consist of different receivers.
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