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SAA4952WP - Memory controller

Description

The memory controller SAA4952WP is the improved version of the SAA4951WP.

The circuit has been designed for high-end TV sets using 2fH technics.

For basic feature modules a 1fH mode can be activated.

Features

  • Support for acquisition, display and deflection PLL.
  • 50/100 Hz (or 60/120 Hz) scan conversion.
  • Progressive scan 50 Hz/1250 lines (60 Hz/1050 lines) interlaced or 50 Hz/625 lines (60 Hz/525 lines) non-interlaced in serial memory structure.
  • 50 Hz/625 lines (60 Hz/525 lines) mode support for a PALplus system and basic features.
  • Acquisition frequencies 12, 13.5, 16 and 18 MHz and display frequencies of 27, 32 and 36 MHz (2fH) in every combination, horizo.

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Other Datasheets by Philips Semiconductors (now NXP Semiconductors)

Part Number Description
SAA4951 Memory controller
SAA4955TJ 2.9-Mbit field memory
SAA4956TJ 2.9-Mbit field memory with noise reduction
SAA4945H LIne MEmory noise Reduction IC LIMERIC
SAA4960 Integrated PAL comb filter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET SAA4952WP Memory controller Objective specification File under Integrated Circuits, IC02 1997 Jun 10 Philips Semiconductors Objective specification Memory controller FEATURES • Support for acquisition, display and deflection PLL • 50/100 Hz (or 60/120 Hz) scan conversion • Progressive scan 50 Hz/1250 lines (60 Hz/1050 lines) interlaced or 50 Hz/625 lines (60 Hz/525 lines) non-interlaced in serial memory structure • 50 Hz/625 lines (60 Hz/525 lines) mode support for a PALplus system and basic features • Acquisition frequencies 12, 13.
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