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SAA4945H - LIne MEmory noise Reduction IC LIMERIC

Description

PARAMETER supply voltage (pins 5, 29 and 30) supply current power dissipation clock frequency bus clock frequency operating ambient temperature ±7%; note 1 CONDITIONS 10

0 MIN.

TYP.

GENERAL DESCRIPTION SAA4945H

Features

  • 2-D adaptive vertically recursive noise reduction.
  • Noise reduction for Y, U and V signals in 4 : 1 : 1 format.
  • Single 5 V ±10% power supply.
  • Communication by means of serial communication protocol 83C654 (SNERT bus).
  • Via SNERT bus, 10 different types of noise reduction selectable; the noise reduction function can also be disabled.
  • Phase relation write enable input/output signal simultaneously switchable over one clock period w. r. t. input/out.

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Full PDF Text Transcription (Reference)

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INTEGRATED CIRCUITS DATA SHEET SAA4945H LIne MEmory noise Reduction IC (LIMERIC) Preliminary specification File under Integrated Circuits, IC02 1997 Jun 10 Philips Semiconductors Preliminary specification LIne MEmory noise Reduction IC (LIMERIC) FEATURES • 2-D adaptive vertically recursive noise reduction • Noise reduction for Y, U and V signals in 4 : 1 : 1 format • Single 5 V ±10% power supply • Communication by means of serial communication protocol 83C654 (SNERT bus) • Via SNERT bus, 10 different types of noise reduction selectable; the noise reduction function can also be disabled • Phase relation write enable input/output signal simultaneously switchable over one clock period w.r.t.
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