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PZ5128 - 128 macrocell CPLD

Description

The PZ5128 CPLD (Complex Programmable Logic Device) is the third in a family of Fast Zero Power (FZP™) CPLDs from Philips Semiconductors.

These devices combine high speed and zero power in a 128 macrocell CPLD.

Features

  • Industry’s first TotalCMOS™ PLD.
  • both CMOS design and process technologies.
  • Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed.
  • IEEE 1149.1.
  • compliant, JTAG Testing Capability.
  • 4 pin JTAG interface (TCK, TMS, TDI, TDO).
  • IEEE 1149.1 TAP Controller.
  • JTAG commands include: Bypass, Sample/Preload, Extest, Usercode, Idcode, HighZ.
  • 5 Volt, In.
  • System Programmable (ISP) using the JTA.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS PZ5128 128 macrocell CPLD Product specification Supersedes data of 1997 Apr 28 IC27 Data Handbook Philips Semiconductors 1997 Aug 12 Philips Semiconductors 128 macrocell CPLD Product specification PZ5128 FEATURES • Industry’s first TotalCMOS™ PLD – both CMOS design and process technologies • Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed • IEEE 1149.1–compliant, JTAG Testing Capability – 4 pin JTAG interface (TCK, TMS, TDI, TDO) – IEEE 1149.
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