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SN74LS174 - Hex D Flip-Flop

Description

The LS174 consists of six edge-triggered D flip-flops with individual D inputs and Q outputs.

The Clock (CP) and Master Reset (MR) are common to all flip-flops.

Each D input’s state is transferred to the corresponding flip-flop’s output following the LOW to HIGH Clock (CP) transition.

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Full PDF Text Transcription

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SN74LS174 Hex D Flip−Flop The LSTTL/MSI SN74LS174 is a high speed Hex D Flip-Flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW to HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. The LS174 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families. • Edge-Triggered D-Type Inputs • Buffered-Positive Edge-Triggered Clock • Asynchronous Common Reset • Input Clamp Diodes Limit High Speed Termination Effects GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage TA Operating Ambient Temperature Range 4.75 5.0 5.
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