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MC74VHCT126A - Quad Bus Buffer

Key Features

  • High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V.
  • Low Power Dissipation: ICC = 4.0 mA (Max) at TA = 25°C.
  • TTL.
  • Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V.
  • Power Down Protection Provided on Inputs.
  • Balanced Propagation Delays.
  • Designed for 2.0 V to 5.5 V Operating Range.
  • Low Noise: VOLP = 0.8 V (Max).
  • Pin and Function Compatible with Other Standard Logic Families.
  • Latchup Performance Exceeds 300 mA.
  • ES.

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Full PDF Text Transcription for MC74VHCT126A (Reference)

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MC74VHCT126A Quad Bus Buffer with 3−State Control Inputs The MC74VHCT126A is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves n...

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bus buffer fabricated with silicon gate CMOS technology. It achieves noninverting high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHCT126A requires the 3−state control input (OE) to be set Low to place the output into high impedance. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V, because it has full 5.0 V CMOS level output swings. The VHCT126A input structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. The output struct