Datasheet Details
| Part number | DM74LS93 |
|---|---|
| Manufacturer | National |
| File Size | 131.84 KB |
| Description | Decade and Binary Counters |
| Datasheet |
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| Part number | DM74LS93 |
|---|---|
| Manufacturer | National |
| File Size | 131.84 KB |
| Description | Decade and Binary Counters |
| Datasheet |
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Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the ’LS90 and divideby-eight for the ’LS93 All of these counters have a gated zero reset and the LS90 also has gated set-to-nine inputs for use in BCD nine’s complement applications To use their maximum count length (decade or four bit binary) the B input is connected to the QA output The input count pulses are applied to input A and the outputs are as described in the appropriate truth table A symmetrical divide-by-ten count can be obtained from the ’LS90 counters by connecting the QD output to the A input and applying the input count to the B input which gives a divide-by-ten square wave at output QA
DM74LS90 DM74LS93 Decade and Binary Counters June 1989 DM74LS90 DM74LS93 Decade and Binary.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
| DM74LS93 | Decade and Binary Counters | Fairchild Semiconductor | |
| DM74LS93M | Decade and Binary Counters | National Semiconductor | |
| DM74LS93M | Decade and Binary Counters | Fairchild Semiconductor | |
| DM74LS93N | Decade and Binary Counters | National Semiconductor | |
| DM74LS93N | Decade and Binary Counters | Fairchild Semiconductor |
| Part Number | Description |
|---|---|
| DM74LS90 | Decade and Binary Counters |
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