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SCAN921821 - Dual 18-Bit Serializer

Description

The SCAN921821 is a dual channel 18-bit serializer featuring signal conditioning, boundary SCAN, and at-speed BIST.

Each serializer block transforms an 18-bit parallel LVCMOS/ LVTTL data bus into a single Bus LVDS data stream with embedded clock.

Features

  • including IEEE 1149.1 and at-speed BIST PRBS pattern generation to facilitate verification of board and link integrity Features n 15-66 MHz Dual 18:1 Serializer with 2.376 Gbps total throughput n 8-level selectable pre-emphasis on each channel drives lossy cables and backplanes n > 15kV HBM ESD protection on Bus LVDS I/O pins n Robust BLVDS serial data transmission with embedded clock for exceptional noise immunity and low EMI n Power saving control pin for each channel n IEEE 1149.1 "JTAG" Com.

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📁 Similar Datasheet

Part Number Description Manufacturer
SCAN921821 Dual 18-Bit Serializer Texas Instruments
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Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
SCAN921023 20-66 MHz 10 Bit Bus LVDS Serializer and Deserializer
SCAN921025 30-80 MHz 10-Bit Bus LVDS Serializer and Deserializer
SCAN921025H High Temperature 20-80 MHz 10 Bit Bus LVDS SerDes
SCAN921224 20-66 MHz 10 Bit Bus LVDS Serializer and Deserializer
SCAN921226 30-80 MHz 10-Bit Bus LVDS Serializer and Deserializer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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November 2004 www.DataSheet4U.com SCAN921821 - Dual 18-Bit Serializer with Pre-emphasis, IEEE 1149.1 (JTAG), and At-Speed BIST SCAN921821 Dual 18-Bit Serializer with Pre-emphasis, IEEE 1149.1 (JTAG), and At-Speed BIST General Description The SCAN921821 is a dual channel 18-bit serializer featuring signal conditioning, boundary SCAN, and at-speed BIST. Each serializer block transforms an 18-bit parallel LVCMOS/ LVTTL data bus into a single Bus LVDS data stream with embedded clock. This single serial data stream with embedded clock simplifies PCB design and reduces PCB cost by narrowing data paths that in turn reduce PCB size and layers. The single serial data stream also reduces cable size, the number of connectors, and eliminates clock-to-data and data-to-data skew.
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