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CLC502 - Clamping/ Low-Gain Op Amp with Fast 14-bit Settling

Features

  • s s s s Output clamping with fast recovery 0.0025% settling in 25ns (32ns max. ) Low power, 170mW Low distortion. -50dBc at 20MHz Output clamping.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CLC502 Clamping, Low-Gain Op Amp with Fast 14-bit Settling June 1999 N CLC502 Clamping, Low-Gain Op Amp with Fast 14-bit Settling General Description Features s s s s Output clamping with fast recovery 0.0025% settling in 25ns (32ns max.) Low power, 170mW Low distortion. -50dBc at 20MHz Output clamping applications High-accuracy A/D systems (12-14 bits) High-accuracy D/A converters Pulse amplitude modulation systems Applications s s s s The CLC502 is available in several versions to meet a variety of requirements. A three-letter suffix determines the version: CLC502AJP -40°C to +85°C CLC502AJE -40°C to +85°C DESC SMD number: 5962-91743 8-pin plastic DIP 8-pin plastic SOIC Package Dimensions Pinout DIP & SOIC © 1999 National Semiconductor Corporation Printed in the U.S.A.
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