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CGS74LCT802 - Low Skew PLL 1-to-8 CMOS Clock Driver

Download the CGS74LCT802 datasheet PDF (CGS64C800 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for low skew pll 1-to-8 cmos clock driver.

Description

These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CGS64C800-NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by National Semiconductor

Full PDF Text Transcription

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o ~National ~ Semiconductor PRELIMINARY eecnn;) .0...I.:.l..o..o.. CGS64/74C800/801/802, CGS64/74CT800/801/802, o0I:loo CD Q CGS/74LCT800/801/802 .Q..... CD Low Skew PLL 1-to-8 CMOS Clock Driver .Q-...... CD General Description Q ,!') These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop. The phase lock loop allows for outputs to lock-on to either SyncLO or SyncL1 inputs, which could be operating at different frequencies. This product is ideal for applications requiring clock synchronization and distribution of either on or off board components.
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