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ISP1161A - Full-speed Universal Serial Bus single-chip host and device controller

General Description

The ISP1161A is a single-chip Universal Serial Bus (USB) Host Controller (HC) and Device Controller (DC).

The Host Controller portion of the ISP1161A complies with Universal Serial Bus Specification Rev.

2.0, supporting data rates at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s).

Key Features

  • s Complies with Universal Serial Bus Specification Rev. 2.0 s The Host Controller portion of the ISP1161A supports data transfer at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s); the Device Controller portion of the ISP1161A supports data transfer at full-speed (12 Mbit/s) s Combines the HC and the DC in a single chip s On-chip DC complies with most USB device class specifications s Both the HC and the DC can be accessed by an external microprocessor via separate I/O port addresses s Selectabl.

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Datasheet Details

Part number ISP1161A
Manufacturer NXP Semiconductors
File Size 587.10 KB
Description Full-speed Universal Serial Bus single-chip host and device controller
Datasheet download datasheet ISP1161A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ISP1161A Full-speed Universal Serial Bus single-chip host and device controller Rev. 03 — 23 December 2004 Product data 1. General description The ISP1161A is a single-chip Universal Serial Bus (USB) Host Controller (HC) and Device Controller (DC). The Host Controller portion of the ISP1161A complies with Universal Serial Bus Specification Rev. 2.0, supporting data rates at full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s). The Device Controller portion of the ISP1161A also complies with Universal Serial Bus Specification Rev. 2.0, supporting data rates at full-speed (12 Mbit/s). These two USB controllers, the HC and the DC, share the same microprocessor bus interface. They have the same data bus, but different I/O locations.